Computer systems typically have a processing unit and a memory system connected to it for storing data. The memory system includes a memory controller and one or more semiconductor memory modules. The processing unit is connected to the memory controller via a bus system and the memory controller is coupled to the semiconductor memory modules via a memory bus system. Each of the semiconductor memory modules comprises at least one register and a number of ranks of memory chips coupled to the register. The registers transmit command/address signals and chip select signals received from the memory controller to the ranks of memory chips. For selecting a specific rank of memory chips for a memory access, respective chip select signals are used to activate the respective rank. Typically, command/address inputs of memory chips of several ranks are coupled in parallel to one output of a single register. The register transmits command/address signals to the respective ranks of memory chips if at least one of the respective chip select signals is active. Therefore, command/address signals are transmitted unnecessarily to ranks of memory chips coupled to the register but not being addressed by a memory access.
Due to the capacitance of the memory chips and the lines coupling the memory chips with the register, power is consumed by the semiconductor memory module each time data signals are transmitted. Therefore, power is wasted during each memory access when transmitting command/address signals to a number of ranks of memory chips that are not addressed.
In addition, due to the increasing operating speed of the semiconductor memory modules, the power consumption further increases.
What is desired is a semiconductor memory module and an electronic apparatus comprising a memory module that consumes low power and a method of operating thereof.